The present invention is related to a semiconductor package, and particularly to a semiconductor package having a heat sink for enhancing the heat-dissipating efficiency.
The reason why the ball grid array (BGA) semiconductor package becomes the main package product is that it can provide sufficient I/O connections to meet the requirement of the semiconductor chip with high-density electronic components and electrical circuits. However, the higher the density of electronic components and electrical circuits on the semiconductor chip, the more the heat generated during the operation. If the heat generated by the semiconductor chip can not be dissipated effectively, the performance and useful life of the semiconductor chip will be affected. Moreover, the high-performance semiconductor chip of the BGA package is typically encapsulated by the encapsulant or resin body. The thermal conductivity K of the resin body is only about 0.8 w/mxc2x0 K so that its thermal conductivity is very poor. Therefore, the heat generated from the active surfaces of electronic components and electrical circuits laid out on the semiconductor chip can not be effectively dissipated to atmosphere through the transmission of the resin body.
In addition, the coefficient of thermal expansion (CTE) of the material of the semiconductor chip is about 3 ppm/xc2x0 C. but that of a general resin used for forming the resin body is up to 20 ppm/xc2x0 C. Thus, after the semiconductor chip is encapsulated by the resin body, under the significant temperature varieties for curing the resin body, for soldering the semiconductor package on the printed circuit board, and for testing the reliability of the semiconductor package in the temperature cycle, the thermal expansion and cold shrinking of the resin body will induce a great thermal stress effect on the semiconductor chip, thereby resulting in the crack of the semiconductor chip. Furthermore, the thicker the resin body, or the tinner or bigger the semiconductor chip, the more significant the thermal stress effect on the semiconductor chip. Therefore, the yield rate of such a conventional semiconductor package still can not be raised effectively.
In order to solve the problem of insufficient heat-dissipating efficiency of the BGA package, it is provided with a heat sink. Although this way of encapsulating the heat sink in the resin body may increase the heat-dissipating efficiency, the path of transmitting the heat generated from the active surface of the semiconductor chip to atmosphere still includes a relatively large portion of the resin body with a poor thermal conductivity. Thus, the entire heat-dissipating efficiency of the semiconductor package can not be increased up to the satisfied degree.
Aiming at the above-described problem existing in the semiconductor package with the heat sink, U.S. Pat. No. 5,977,626 discloses a semiconductor package in which a heat sink is directly adhered to the active surface of the chip. As shown in FIG. 8, this semiconductor package has a heat sink 10 with a top surface 100 exposed out of the resin body 11. There is a protrusion 102 formed on a bottom surface of the heat sink 10 relative to the chip 12. The protrusion 102 is directly adhered to the active surface of the chip such that the heat generated from the active surface of the chip 12 can be transmitted to the heat sink 10 to be dissipated to atmosphere directly from the top surface 100 of the heat sink 10. Because the heat generated by the chip 12 is not transmitted through the resin body 11 and the top surface 100 of the heat sink 10 is exposed in the air, this semiconductor package has a good heat-dissipating efficiency. However, the heat sink of such a semiconductor package 1 is directly adhered to the chip 12 so that the heat sink 10 will be clamped by the mold during molding process. Because of the tolerance in the thickness of the heat sink 10 and the chip 12, thereby resulting in the crack of the chip. This condition may be easily happened when the chip has a tendency to become larger and thinner. Even though there is no tolerance in the thickness of the heat sink 10 and the chip 12, the heat sink 10 made of general copper having the coefficient of thermal expansion (CTE) up to 18 ppm/xc2x0 C. will still induce a thermal stress effect on the chip 12 having the coefficient of thermal expansion (CTE) of 3 ppm/xc2x0 C. under the temperature variation of subsequent packaging or the temperature cycle for testing the reliability of the semiconductor package, thereby resulting in the crack of the chip 12.
Therefore, it is desirable to improve the reliability of the semiconductor package 1.
In view of the above-described shortcomings of the conventional semiconductor package, as shown in FIG. 9, there must leave an appropriate distance between the protrusion 202 of the heat sink 20 and the chip 22 to prevent directly from contacting with each other. Although the heat generated by the chip 22 can not be directly transmitted to the heat sink 20, the reliability and manufacturing problem can be solved effectively to redeem the low heat-dissipating efficiency of product. However, as shown in FIG. 10, after the resin flow introduced from a molding gate 24 on a corner of the substrate 23 flows into the gap between the chip 22 and the protrusion 202, the flow speed will be decreased due to the narrow flow channel. Hence, the flow speed of resin flow outside the gap is greater than that of resin flow within the gap, shown as a curve of flow speed in this figure. The uneven flow speed often causes the formation of void 25 in the gap as shown in FIG. 11. The formation of void easily results in the popcorn of such a semiconductor package under the high-temperature surrounding and affects the reliability of product.
An object of the present invention is to provide a semiconductor package with a heat sink, which has high heat-dissipating efficiency and excellent reliability.
According to the present invention, the semiconductor package includes a substrate; a chip adhered to and electrically connected with the substrate; a heat sink having a planar plate and a support for supporting the planar plate to a predetermined height for positioning the planar plate above the chip, wherein the planar plate has a top surface exposed outside a resin body, and a bottom surface opposed to the top surface and having a thick portion formed relative to the position of the chip, further an end surface of the thick portion having a plurality of flow channels formed along the direction that the resin flows into the molding gate, wherein there is a gap formed between the end surface of the thick portion and the chip; and a resin body encapsulating the chip and the heat sink, wherein the top surface of the heat sink is exposed outside the resin body.
The flow channels are formed by a plurality of slots formed on the end surface of the thick portion or constructed by a plurality of gibbous projections formed on the end surface of the thick portion in an array arrangement in which the gap between any two rows of gibbous projections is formed as a flow channel. The flow channel can effectively prevent the flow speed of the resin flowing through the gap between the thick portion and the chip from slowing down by the narrow space, and thus it can avoid the formation of void in the gap. In addition, the thickness of the resin body between the thick portion and the chip can be reduced. Hence, the heat-transmitting distance in the gap can be shortened to effectively enhance the heat-dissipating efficiency.